I wanted take a quick look at the guts of the A10500 switch because its got some interesting features. And since no one lese in the press even looked at the box, I feel it’s necessary to do some nerd-level detail.
So this is the front of the A10500 chassis. It looks like a standard chassis – it’s what I’m expecting to see for the physical layout of the switch. This unit has 24x10GbE line card, 4 x 40GbE.
Basic stats
- 128 wire speed 10GbE
- IRF for 208 port core
- 3 usec latency
- 40GbE now, 100GBE ready.
- available 2H 2011
One astonishing fact is that the backplane is 11Terabits per second, 10.9 billion packets per second.
I pulled the Supervisor module from the box, here is a picture. I’ve made some notes about what each of the chips glued to the boards do.
This is the 4 x 40GbE line card – you won’t see to many of these.
And this is me, looking happy because I’ve got some toys to play with. Plus, I’ve just had a fantastic free lunch – that smile is part technical and part indigestion 
Disclaimer
HP Networking have paid for my travel and accommodation for Interop so that I am able to attend the briefing, meet executives and have good quality discussions. I’d like to think, and take care to ensure, that my opinions and views are my own. I am not remunerated in any other way.
