Content-addressable memory (CAM) is silicon chip architecture that is purpose-built for extremely fast but very specific type of memory lookups. Lookups using a CAM is conceptually similar to associative array logic in data structures but the output are highly simplified. When key is passed to a CAM sub-system it returns the associated value to that key. As a result a “key -> value” pair is created that can be referenced further as an object. The most important feature is that a lookup of an entry in a CAM can be performed in a single clock cycle in the silicon. Compare this with a RAM module that requires multiple clock cycles to make a single memory fetch.
Difference between RAM and CAM
Random Access Memory (RAM) performs lookups using a memory address and which then returns the data from the address. CAM lookups do the opposite. A function calls the CAM by passing a key that consists of data word structure and the CAM lookup returns memory addresses. CAM further differentiates itself from different types of memory in that it can do memory lookups in one clock cycle. This is the most common way to accommodate hardware search ASICs.
Packet processing in routing and switch silicon based hardware in L2 and L3 CAM.
Not possible in DRAM: Remember that using DRAM in networking is simply too slow to perform a lookup. DRAM memory lookups typically takes multiple clock cycles from the CPU to clock data in and out over the I/O bus (and operates at much lower clock speeds). There are some alternatives to implement hardware using Hash Based functions but these don’t seem have taken hold as yet.
CAM is Static RAM
A CAM cell in the chip actually consists of two SRAM cells. SRAM requires requires extensive silicon gates to implement that require a lot of power per gate for fast switching. In a chip, power consumption generates heat and leads to limits on thermal dissipation by the limited footprint of a chip. This is a key factor on the physical limitation on TCAM size today.
SRAM (Static RAM) is type of RAM (Random Access Memory) that retains data bits in its memory as long as power is applied. DRAM (Dynamic RAM) stores data as capacitive charge in a transistor and must be regularly refreshed before the charge is lost. Time spent in the refresh cycle recharging the capacitor reduces the available performance.
Static RAM is significantly faster access but requires more power, more space and is more on die components than DRAM. Secondary effects of power routing on silicon die and thermal management make manufacturing SRAM relatively expensive.
It’s possible to cascade CAM up to eight levels without incurring a performance penalty but beyond this the cost/power return becomes unfeasible.
Types of CAM
Postscript: A colleague enhanced and expanded on the concepts in this post at CAM Table Basics and clarified a number of points. You might want to read it too.